Non-volatile data storage devices have enabled increased portability of data and software applications. For example, multi-level cell (MLC) storage elements of a flash memory device may each store multiple bits of data, enhancing data storage density as compared to single-level cell (SLC) flash memory devices. Consequently, flash memory devices enable users to store and access a large amount of data. As a number of bits stored per cell increases, bit errors in stored data typically increase. A data storage device may encode and decode data using an error correcting code (ECC) technique to correct certain bit errors in data. The ECC technique may utilize parity information that decreases data storage capacity for other information, such as user data.
To further increase data storage capacity, advances in memory device technology have resulted in memory devices that have a three-dimensional (3D) configuration. For example, a 3D memory device includes a plurality of memory cells that are vertically stacked and positioned in different layers (e.g., different levels) of multiple vertically stacked layers. A group of memory cells that is vertically stacked may be coupled with a conductive channel. During manufacturing of the 3D memory device, a hole may be created through the multiple vertically stacked layers to enable formation of the conductive channel. However, as a number of layers that the hole extends through increases, controlling formation of the hole becomes difficult. For example, a shape of the hole may not be a cylindrical shape through all of the multiple layers; rather, the hole may have a tapered shape through one or more of the multiple layers. To illustrate, a cross-section of the hole through the multiple layers may have a conical shape or a funnel shape. When the hole does not have a consistent shape (e.g., a consistent diameter) through all of the multiple layers, physical dimensions of one or more memory cells may be affected which may result in reduced performance of those memory cells.